Specifications

Revisions
ARM DUI 0447J Copyright © 2009-2014, ARM. All rights reserved. C-7
ID052914 Non-Confidential
Table C-9 Differences between Issue H and Issue I
Change Location Affects
Added Address Valid (nADV) signal to SMB
timing diagrams.
Figure B-1 on page B-2
Figure B-2 on page B-3
All versions
Clarified maximum current loading of motherboard
voltage regulators by CoreTile Express or LogicTile
Express daughterboards.
Table B-2 on page B-7 All versions
Table C-10 Differences between Issue I and Issue J
Change Location Affects
Updated description of PCI-Express daughterboard
root complex. Motherboard supports a root complex
on either daughterboard, but not both. By default,
the root complex is on the daughterboard in Site 1.
The motherboard does not support an endpoint on
either daughterboard.
PCIe Bus on page 2-5
PCI-Express on page 2-15
All versions