Specifications

Revisions
ARM DUI 0447J Copyright © 2009-2014, ARM. All rights reserved. C-2
ID052914 Non-Confidential
Table C-3 Differences between Issue B and Issue C
Change Location Affects
Switch names changed from:
• Power on/off and reset push button to ON/OFF/Soft
Reset push button
• Standby push button to Hardware RESET push button
See Figure 1-2 on page 1-4 and
throughout the document.
All versions.
Title changed for ease of understanding to Power-on, on/off,
and reset signals and section updated.
Power up, on/off and reset signals
on page 2-6.
All versions.
First sentence updated below Motherboard clocks table to
reflect that you use the
board.txt file to configure the
motherboard.
Table 2-1 on page 2-9. All versions.
Caution updated below Motherboard clocks table to reflect
that you use the
board.txt file to configure the motherboard.
Table 2-1 on page 2-9. All versions.
Additional bullet added to explain the location of the
board.txt
file and Application note. SITE2 directory bullet updated to
reflect daughterboard Site 2. These bullets are located after the
Typical USBUMB directory example.
Figure 3-6 on page 3-15. All versions.
AUTORUN, WDTRESET, and PCIMASTER added to Example
config.txt file and CONFIGURATION section below the
example.
Figure 3-6 on page 3-15. All versions.
Information on
image.txt file updated with more user
information.
Contents of the directory for
CoreTile Express boards on page
3-19.
All versions.
Example Typical motherboard board.txt file updated to show
additional range information for OSC1 and OSC2 and that
OSC3 has a value of 24MHz.
Example 3-4 on page 3-18. All versions.
Headings changed to reflect CoreTile Express boards. Contents of the directory for
CoreTile Express boards on page
3-19.
All versions.
FxMODE explained in FPGAS section. List entry FPGAs section in
Contents of the directory for
CoreTile Express boards on page
3-19.
All versions.
Heading changed to reflect LogicTile Express boards. Contents of the directory for
LogicTile Express boards on page
3-23.
All versions.
System memory map as viewed from a CoreTile Express
daughterboard figure changed to reflect that the daughterboard
is aliased from 0x80000000 .
Figure 4-1 on page 4-3. All versions.
Table added to 100Hz Counter Register. Table 4-7 on page 4-12. All versions.
SYS_PROCID0 and SYS_PROCID1 Register bit assignments
figures updated.
Figure 4-11 on page 4-18
Figure 4-12 on page 4-20.
All versions.