Specifications

Programmers Model

ID052914 Non-Confidential

Table 4-34 provides information on the timers.

At reset, the timers are clocked by a 32.768kHz reference from an external oscillator module.

You can, however, use the System Controller to change the timer reference from 32.768kHz to

1MHz.

4.5.10 UART

The PL011 PrimeCell UART is an AMBA-compliant SoC peripheral that is developed, tested,

and licensed by ARM. The 24MHz reference clock to the UARTs is from the crystal oscillator

that is part of

OSCCLK2

The internal registers of the UART peripheral are memory-mapped onto a static memory bus

chip select. The chip select that they map onto depends on the memory map your daughterboard

is using as follows:

• ARM legacy memory map:

— The registers map onto the CS7 chip select.

• Cortex-A Series memory map:

— The registers map onto the CS3 chip select.

Note

See the Technical Reference Manual for your daughterboard.

Table 4-34 Timer implementation

Property Value

Location Motherboard IO FPGA

Memory base address • ARM Legacy memory map:

— Timer 0, 1: SMB CS7 base address +

0x11000

— Timer 2, 3: SMB CS7 base address +

0x12000

•ARM Cortex-A Series memory map:

— Timer 0, 1: SMB CS3 base address +

0x11000

— Timer 2, 3: SMB CS3 base address +

0x12000

Interrupt • Timer 0: TIM01INT[2]

• Timer 1: TIM01INT[2]

• Timer 2: TIM23INT[3]

• Timer 3: TIM23INT[3]

DMA None

Release version ARM Dual-Timer SP804 r1p2

Platform Library support timer_enable Enables a timer with a given period and mode.

timer_disable Disables the defined timer.

timer_interrupt_clear Clears the timer interrupt.

Reference documentation

ARM

Dual-Timer Module (SP804) Technical Reference Manual