Specifications

Programmers Model
ARM DUI 0447J Copyright © 2009-2014, ARM. All rights reserved. 4-36
ID052914 Non-Confidential
Table 4-33 show the registers that control the serial bus interface.
Note
Software must manipulate the SCL and SDA bits directly to access the data in the devices. SDA
is an open-collector signal that is used for sending and receiving data. Set the output, sending,
value HIGH before reading the current value.
4.5.9 Timers
The SP804 Dual-Timer module is an AMBA-compliant SoC peripheral that is developed,
tested, and licensed by ARM.
The Dual-Timer module consists of two programmable 32/16-bit down counters that can
generate interrupts when they reach zero.
The internal registers of the Dual-Timer module are memory-mapped onto a static memory bus
chip select. The chip select that they map onto depends on the memory map your daughterboard
is using as follows:
• ARM legacy memory map:
— The registers map onto the CS7 chip select.
• Cortex-A Series memory map:
— The registers map onto the CS3 chip select.
Note
See the Technical Reference Manual for your daughterboard.
Table 4-33 SBCon 1 serial bus register
Address Name Access Description
• ARM Legacy memory map:
—CS7 +
0x00016000
• Cortex-A Series memory map:
— C3 + 0x00016000
SB_CONTROL Read Read serial control bits:
Bit [0] is SCL
Bit [1] is SDA
• ARM Legacy memory map:
—CS7 +
0x00016000
• Cortex-A Series memory map:
— C3 +
0x00016000
SB_CONTROLS Write Set serial control bits:
Bit [0] is SCL
Bit [1] is SDA
• ARM Legacy memory map:
—CS7 +
0x00016004
• Cortex-A Series memory map:
— C3 +
0x00016004
SB_CONTROLC Write Clear serial control bits:
Bit [0] is SCL
Bit [1] is SDA