Specifications

Programmers Model
ARM DUI 0447J Copyright © 2009-2014, ARM. All rights reserved. 4-30
ID052914 Non-Confidential
Figure 4-16 CF_CTRL Register bit assignments
Table 4-25 shows the register bit assignments.
4.5.4 Ethernet
The Ethernet interface is implemented in an external SMCS LAN9118 10/100 Ethernet
single-chip MAC and PHY. The internal registers of the LAN9118 are memory-mapped onto a
static memory bus chip select. The chip select that they map onto depends on the memory map
your daughterboard is using as follows:
• ARM legacy memory map:
— The registers map onto the CS7 chip select.
• Cortex-A Series memory map:
— The registers map onto the CS3 chip select.
Note
See the Technical Reference Manual for your daughterboard.
031
Undefined
110 9 87
CF_nCD1
23
Reserved
CF_PWR_CONTROL
CF_RESETn
CFPOWER
CF_nCD2
UndefinedPulse
151620 19
Table 4-25 CF_CTRL Register bit assignments
Bits Access Name Reset Description
[31:20] Write ignored, read as zero -
0x00000 Undefined.
[19:16] Read-write Pulse
0x00000 Pulse width.
[15:10] Write ignored, read as zero -
0x00000 Undefined.
[9] Read-only CF_nCD2
b1 Card detection:
b00 Card inserted.
bx1 Card not inserted.
b1x Card not inserted.
[8] Read-only CF_nCD1
b1
[7:3] Write ignored, read as zero - b00000 Reserved.
[2] Read-write CF_PWR_CONTROL
b0 Power control:
b0 Determined by CFPOWER, bit 0.
b1 Determined by chip detect, CF card.
[1] Read-write CF_RESETn
b0 Card reset, active LOW.
[0] Read-write CFPOWER
b0 Card power:
b0 No power applied to card.
b1 3.3V applied to card.