Specifications

Programmers Model
ARM DUI 0447J Copyright © 2009-2014, ARM. All rights reserved. 4-26
ID052914 Non-Confidential
4.5 IO Peripherals and interfaces
This section describes the following peripherals and interfaces in the memory map:
Advanced Audio CODEC Interface
Color LCD Controller on page 4-27
Compact Flash interface on page 4-29
Ethernet on page 4-30
Keyboard and Mouse Interface, KMI on page 4-32
MultiMedia Card Interface, MCI on page 4-32
Real Time Clock, RTC on page 4-33
Two-wire serial bus interface, SBCon on page 4-34
Timers on page 4-36
UART on page 4-37
USB interface on page 4-39
Watchdog on page 4-40.
4.5.1 Advanced Audio CODEC Interface
The PL041 PrimeCell Advanced Audio CODEC Interface (AACI) is an AMBA
®
-compliant SoC
peripheral that is developed, tested, and licensed by ARM. Table 4-21 shows the AACI
implementation.
PrimeCell Modifications
The AACI PrimeCell in the motherboard FPGA has a different FIFO depth than the standard
PL041. Figure 4-15 on page 4-27 shows the register bit assignments.
Table 4-21 AACI implementation
Property Value
Location Motherboard IO FPGA
Memory base address ARM Legacy memory map:
SMB CS7 base address +
0x4000
•ARM Cortex-A Series memory map:
SMB CS3 base address +
Ox40000
Interrupt 11
DMA mapping See Table 4-14 on page 4-18.
Release version ARM AACI PL041 r0p0, modified to one channel and 256 FIFO depth in compact mode, and 512 FIFO
depth in non-compact mode.
Platform Library support No support provided.
Reference documentation
ARM
®
PrimeCell Advanced Audio CODEC Interface (PL041) Technical Reference Manual and National
Semiconductor LM4549 Data Sheet. See also the Modified AACI PeriphID3 register Table 4-22 on
page 4-27.