Specifications

Programmers Model
ARM DUI 0447J Copyright © 2009-2014, ARM. All rights reserved. 4-18
ID052914 Non-Confidential
Figure 4-3 on page 4-10 shows the bit assignments.
Figure 4-10 SYS_DMA Register bit assignments
Table 4-14 shows the bit assignments.
4.4.12 SYS_ PROCID0 Register
The SYS_PROCID0 Register characteristics are:
Purpose Indicates the core or cluster type at the CoreTile Express Site 1.
Usage constraints See Table 4-15 on page 4-19.
Configurations See Table 4-15 on page 4-19.
Attributes See Table 4-3 on page 4-8.
Figure 4-11 shows the bit assignments.
Figure 4-11 SYS_PROCID0 Register bit assignments
Undefined
31 0
DMA select
1
2
Table 4-14 SYS_DMA Register bit assignments
Bits Name Reset Description
[31:2] -
0x0000 Undefined
[1:0] DMA select DMA ACK/REQ pair select:
00 AACI RX (SB_nDRQ/nDACK[0])
AACI TX (SB_nDRQ/nDACK[1])
01 AACI RX (SB_nDRQ/nDACK[0])
MCI (SB_nDRQ/nDACK[1])
10 AACI TX (SB_nDRQ/nDACK[0])
MCI (SB_nDRQ/nDACK[1])
11 UART0 RX (SB_nDRQ/nDACK[0])
UART0 TX (SB_nDRQ/nDACK[1])
31 24 23 12 11 0
PROC_ID0 HBI number
20
BOARD
REVISION
19 16 15
BOARD
VARIANT
Undefined