Specifications

Programmers Model
ARM DUI 0447J Copyright © 2009-2014, ARM. All rights reserved. 4-6
ID052914 Non-Confidential
Table 4-2 shows the peripherals and memory on the motherboard when using the ARM
Cortex-A Series memory map. The addresses are offsets are from the base addresses of the SMB
chip selects.
Table 4-2 Motherboard peripheral ARM Cortex-A Series memory map
Peripheral Interface logic SMB chip select Address offset
NOR Flash 0 - CS0
0x00000000 - 0x03FFFFFF
Reserved - - 0x04000000 - 0x07FFFFFF
NOR Flash 0 - CS0 0x08000000 - 0x0BFFFFFF
NOR Flash 1 - CS4 0x00000000 - 0x03FFFFFF
Reserved - CS5 0x00000000 - 0x03FFFFFF
User SRAM - CS1 0x00000000 - 0x03FFFFFF
Video SRAM CS2 0x00000000 - 0x01FFFFFF
Ethernet CS2 0x02000000 - 0x02FFFFFF
USB CS2 0x03000000 - 0x03FFFFFF
Local DAP ROM CS3 0x00000000 - 0x0000FFFF
System registers Custom CS3 0x00010000 - 0x0001FFFF
System control ARM SP810 CS3 0x00020000 - 0x0002FFFF
Serial Bus PCI Custom CS3 0x00030000 - 0x0003FFFF
AACI ARM PL041 CS3 0x00040000 - 0x0004FFFF
MMCI ARM PL180 CS3 0x00050000 - 0x0005FFFF
KMI0 ARM PL050 CS3 0x00060000 - 0x0006FFFF
KMI0 ARM PL050 CS3 0x00070000 - 0x0007FFFF
Reserved - CS3 0x00080000 - 0x0008FFFF
UART0 ARM PL011 CS3 0x00090000 - 0x0009FFFF
UART1 ARM PL011 CS3 0x000A0000 - 0x000AFFFF
UART2 ARM PL011 CS3 0x000B0000 - 0x000BFFFF
UART3 ARM PL011 CS3 0x000C0000 - 0x000CFFFF
Reserved - CS3 0x000D0000 - 0x000DFFFF
Reserved - CS3 0x000E0000 - 0x000EFFFF
WDT ARM SP805 CS3 0x000F0000 - 0x000FFFFF
Reserved - CS3 0x00100000 - 0x0010FFFF
TIMER0/1 ARM SP804 CS3 0x00110000 - 0x0011FFFF
TIMER2/3 ARM SP804 CS3 0x00120000 - 0x0012FFFF
Reserved - CS3 0x00130000 - 0x0013FFFF
Reserved - CS3 0x00140000 - 0x0014FFFF