Specifications

Programmers Model
ARM DUI 0447J Copyright © 2009-2014, ARM. All rights reserved. 4-5
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4.2.2 ARM Cortex-A Series memory map
Figure 4-2 shows an example of the ARM Cortex-A Series memory map when the motherboard
is used with the CoreTile Express A5x2 daughterboard.
Figure 4-2 ARM Cortex-A Series system memory map as viewed from a CoreTile Express A5x2 daughterboard
Caution
The attached daughterboard defines the address ranges for the SMB chip selects.
Reserved - CS3 0x00800000-0x01FFFFFF
Ethernet SMSC LAN9118 CS3 0x02000000-0x02FFFFFF
USB Philips ISP1761 CS3 0x03000000-0x03FFFFFF
Table 4-1 Motherboard peripheral ARM legacy memory map (continued)
Peripheral Interface logic SMB chip select Address offset
Motherboard memory and peripherals
(SMB CS0 to CS6)
Daughterboard
test chip peripherals
Daughterboard
memory
0xFFFFFFFF
0x20000000
0x04000000
0x08000000
0x0C000000
0x10000000
0x14000000
0x00000000
0x40000000
0x00000000
0x80000000
Daughterboard
(HSB AXI buses)
0x1C000000
0x18000000
=
=
CS3
CS2
= CS1
= CS5
= CS4
= CS0
= Reserved
= CS0