Specifications
Hardware Description
ARM DUI 0447J Copyright © 2009-2014, ARM. All rights reserved. 2-5
ID052914 Non-Confidential
High-Speed Bus
The motherboard connects the two daughterboards with two High-Speed Buses (HSB). The bus
interconnect can provide up to:
• 360 single-ended signals.
• 160 Low Voltage Differential Signalling (LVDS) signal pairs.
Note
• The HSB typically implements a multiplexed AXI bus.
• There is no connection from the HSB to devices on the motherboard. See the
documentation for your daughterboard.
PCIe Bus
The motherboard supports four PCI-Express (PCIe) slots, x4, x4, x8, and x16 connector sizes,
each with a lane width of four. A PCI-Express switch connects these slots to the daughterboards
over the PCIe bus that has eight lanes to each daughterboard. See Figure 2-1 on page 2-2 for
more information.
Note
The V2M-P1 motherboard supports a root complex either on the daughterboard in Site 1 or the
daughterboard in Site 2. By default the daughterboard in Site 1 is the root complex.
The V2M-P1 motherboard does not support an endpoint on either daughterboard.
See PCI-Express on page 2-15.