Specifications

Interrupt vector table address space

0xFFF82000

0xFFF82004

0xFFF82008

Phantom Vector

Channel 0 Vector

Channel 1 Vector

Channel 93 Vector

Channel 94 Vector

0xFFF82178

0xFFF8217C

Standard Initialization Sequence for Hercules Microcontrollers

www.ti.com

Figure 4. VIM Interrupt Address Memory Map

2.30.1 Configure Interrupts to be Fast Interrupts or Normal Interrupts

Each interrupt request to the VIM can be configured to be forwarded to the CPU as a fast interupt request

(FIQ) or a normal interrupt request (IRQ). The FIQ/IRQ Program Control Registers (FIRQPRx) allow this

selection.

Interrupt requests 0 and 1 are always FIQ. All others are IRQ interrupts by default.

NOTE: An interrupt request mapped to FIQ cannot use the CPU’s VIC port.

2.30.2 Enabling and Disabling Interrupts

Each interrupt request can be enabled or disabled using the Interrupt Enable Set (REQENASETx) and

Interrupt Enable Clear (REQENACLRx) registers. The interrupt requests 0 and 1 are always enabled and

cannot be disabled. When an interrupt is disabled, it does not prevent the interrupt flag to get set when the

interrupt condition is generated but no IRQ or FIR exception is generated for the Cortex-R4F CPU.

2.31 Enable Interrupts in the Cortex-R4F CPU

Interrupts (IRQ and FIQ) are disabled inside the Cortex-R4F CPU by default and after a CPU reset. The

normal interrupt can be enabled by clearing the "I" bit of the Current Program Status Register (CPSR)

inside the Cortex-R4F CPU, while the fast interrupt (FIQ) can be enabled by clearing the "F" bit of the

CPSR.

2.32 Setup the Error Signaling Module (ESM) Responses to Group1 Errors

The ESM allows the application to choose the module response to errors in the Group1 classification.

These are errors of the lowest severity and can be handled by the application by generating an interrupt to

the CPU. The ESM also offers the capability to indicate any group1 errors on the external nERROR pin.

2.33 Additional Initializations Required by Compiler

If the source program is written using C or C++, the TI compiler requires the creation of the C/C++ run-

time environment. This includes:

• Initialization of copy table, if required

Initialization of Hercules™ ARM

Cortex™-R4F Microcontrollers SPNA106D–May 2013

Submit Documentation Feedback