Datasheet

DocID024647 Rev 1 97/138
RM0352 I
2
C bus interface
137
10.2.20 I
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C peripheral identification register 2 (I2C_PERIPHID2)
Table 90. I
2
C peripheral identification register 2 (I2C_PERIPHID2)
Address: I2CBaseAddress + 0xFE8
Type: R
Reset: 0x00000038
Description: I
2
C peripheral identification register 2.
10.2.21 I
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C peripheral identification register 3 (I2C_PERIPHID3)
Table 91. I
2
C peripheral identification register 3 (I2C_PERIPHID3)
Address: I2CBaseAddress + 0xFEC
Type: R
Reset: 0x00000000
Description: I
2
C peripheral identification register 3.
I
2
C peripheral identification register 2 (I2C_PERIPHID2)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED REVISION DESIGNER1
RRR
[7:4] REVISION: these bits read back as 0x3.
[3:0] DESIGNER1: these bits read back as 0x8.
I
2
C peripheral identification register 3 (I2C_PERIPHID3)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED CONFIGURATION
RR
[7:0] CONFIGURATION: these bits read back as 0x00.