Datasheet

System timer (SysTick) RM0352
68/138 DocID024647 Rev 1
9.3 SysTick registers descriptions
9.3.1 SysTick control and status register (SYST_CSR)
Address: SysTick BaseAddress + 0x000
Type: R/W
Reset: 0x00000004
Description: SysTick control and status register
9.3.2 SysTick reload value register (SYST_RVR)
Address: SysTick BaseAddress + 0x004
Table 66. SysTick control and status register
SysTick control and status register (SYST_CSR)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED
COUNTFLAG
RESERVED
CLKSOURCE
TICKINT
ENABLE
[31:17] RESERVED
[16] COUNTFLAG: returns 1 if timer counted to 0 since the last read of this
register.
[15:3] RESERVED
[2] CLKSOURCE: selects the SysTick timer clock source
0: external reference clock
1: processor clock
[1] TICKINT: enables SysTick exception request
0: counting down to zero does not assert the SysTick exception request.
1: counting down to zero asserts the SysTick exception request.
[0] ENABLE: enables the counter.
0: counter disabled
1: counter enabled
Table 67. SysTick reload value register
SysTick reload value register (SYST_RVR)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED RELOAD