Datasheet

ARM
©
dual timer module (SP804) RM0352
54/138 DocID024647 Rev 1
Free running mode
Free running mode is selected by setting the following bits in the TimerControl register:
• Set TimerMode bit to 1
• Set OneShot bit to 0.
The 32-bit or 16-bit counter operation is selected by setting the TimerSize bit appropriately
in the TimerControl register.
On reset the timer value is initialized to 0xFFFFFFFF and if the counter is enabled then the
count decrements by one for each TIMCLK positive edge when TIMCLKENX is HIGH and
the prescaler generates an enable pulse. Alternatively, a new initial counter value can be
loaded by writing to the TimerXLoad register and the counter starts decrementing from this
value if the counter is enabled.
In 32-bit mode, when the count reaches zero, 0x00000000, an interrupt is generated and
the counter wraps around to 0xFFFFFFFF irrespective of the value in the TimerXLoad
register. The counter starts to decrement again and this whole cycle repeats for as long as
the counter is enabled.
In 16-bit mode, only the least significant 16-bits of the counter are decremented and when
the count reaches 0x0000, an interrupt is generated and the counter wraps round to 0xFFFF
irrespective of the value in the TimerXLoad register.
If the counter is disabled by clearing the TimerEn bit in the TimerControl register, the counter
halts and holds its current value. If the counter is re-enabled again then the counter
continues decrementing from the current value.
The counter value can be read at any time by reading the TimerXValue register.
Periodic mode
Periodic mode is selected by setting the following bits in the TimerControl register:
• Set TimerMode bit to 0
• Set OneShot bit to 0.
The 32-bit or 16-bit counter operation is selected by setting the TimerSize bit appropriately
in the TimerControl register.
An initial counter value can be loaded by writing to the TimerXLoad register and the counter
starts decrementing from this value if the counter is enabled.
In 32-bit mode, the full 32 bits of the counter are decremented and when the count reaches
zero, 0x00000000, an interrupt is generated and the counter reloads with the value in the
TimerXLoad register. The counter starts to decrement again and this whole cycle repeats for
as long as the counter is enabled.
In 16-bit mode, only the least significant 16-bits of the counter are decremented and when
the count reaches 0x0000, an interrupt is generated and the counter reloads with the value
in the TimerXLoad register. The counter starts to decrement again and this whole cycle
repeats for as long as the counter is enabled.
If a new value is loaded into the counter by writing to the TimerXLoad register while the
counter is running then the counter values change to the new load value on the next
TIMCLK when TIMCLKENX is HIGH.
If a new value is written to the background load register, TimerXBGLoad, while the counter
is running then the TimerXLoad register is also updated with the same load value but the
counter continues to decrement to zero. When it reaches zero, the counter reloads with the