Datasheet

SPI (serial peripheral interface) RM0352
110/138 DocID024647 Rev 1
The following subsections describe the four 8-bit peripheral identification registers:
SSPPeriphID0 register
SSPPeriphID1 register
SSPPeriphID2 register
SSPPeriphID3 register
SSPPeriphID0 register
The SSPPeriphID0 register characteristics are:
Purpose The SSPPeriphID0 register is hard-coded and the fields within the
register determine the reset value.
Usage constraints There are no usage constraints.
Configurations Available in all SSP configurations.
Attributes See Table 96 on page 101.
Table 106 shows the bit assignments.
SSPPeriphID1 register
The SSPPeriphID1 register characteristics are:
Purpose The SSPPeriphID1 register is hard-coded and the fields within the
register determine the reset value.
Usage constraints There are no usage constraints.
Configurations Available in all SSP configurations.
Attributes See Table 96 on page 101.
Table 107 shows the bit assignments.
SSPPeriphID2 register
The SSPPeriphID2 register characteristics are:
Purpose The SSPPeriphID2 register is hard-coded and the fields within the
register determine the reset value.
Table 106. SSPPeriphID0 register bit assignments
Bits Name Description
[15:8] RESERVED RESERVED, read undefined must read as zeros
[7:0] PartNumber0 These bits read back as 0x22
Table 107. SSPPeriphID1 register bit assignments
Bits Name Description
[15:8] RESERVED RESERVED, read undefined, must read as zeros
[7:4] Designer0 These bits read back as 0x1
[3:0] PartNumber1 These bits read back as 0x0