User guide

Embedded Trace Macrocell
ARM DDI 0337I Copyright © 2005-2008, 2010 ARM Limited. All rights reserved. 10-11
ID072410 Non-Confidential
10.3.3 Main Control Register, ETMCR
The ETMCR characteristics are:
Purpose Controls general operation of the ETM, such as whether tracing is enabled.
Usage constraints There are no usage constraints.
Configurations This register is only available if the processor is configured to use the
ETM.
Attributes See the ETM register summary in Table 10-6 on page 10-9.
Figure 10-2 shows the ETMCR bit assignments.
Figure 10-2 ETMCR bit assignments
Table 10-7 on page 10-12 shows the ETMCR bit assignments.
0xE0041FD0 ETMPIDR4 0x00000004 RO
Peripheral Identification registers. See ARM Embedded Trace
Macrocell Architecture Specification
0xE0041FD4 ETMPIDR5 0x00000000 RO
0xE0041FD8 ETMPIDR6 0x00000000 RO
0xE0041FDC ETMPIDR7 0x00000000 RO
0xE0041FE0 ETMPIDR0 0x00000024 RO
0xE0041FE4 ETMPIDR1 0x000000B9 RO
0xE0041FE8 ETMPIDR2 0x0000003B RO
0xE0041FEC ETMPIDR3 0x00000000 RO
0xE0041FF0 ETMCIDR0 0x0000000D RO
Component Identification registers. See ARM Embedded Trace
Macrocell Architecture Specification
0xE0041FF4 ETMCIDR1 0x00000090 RO
0xE0041FF8 ETMCIDR2 0x00000005 RO
0xE0041FFC ETMCIDR3 0x000000B1 RO
Table 10-6 ETM registers (continued)
Address Name Reset Type Description
31 22 20 17 16 15 13 12 8 7 4 3 0
Port size[3]
21
Reserved
Port mode[1:0]
18
Port mode[2]
ETM port select (ETMEN) ETM programming
Debug request control
Branch output
Stall processor (FIFOFULL)
ETM
power down
196
Port size[2:0]
14 11 10
Reserved
Reserved
Reserved
Timestamp
enable
28
ReservedReserved
29 27