User guide
Embedded Trace Macrocell
ARM DDI 0337I Copyright © 2005-2008, 2010 ARM Limited. All rights reserved. 10-10
ID072410 Non-Confidential
0xE00411E4
ETMIDR
0x4114F253
RO ID Register, ETMIDR on page 10-17
0xE00411E8
ETMCCER
0x18541800
RO Configuration Code Extension Register, ETMCCER on page 10-18
0xE00411F0
ETMTESSEICR - RW TraceEnable Start/Stop EmbeddedICE Control Register,
ETMTESSEICR on page 10-19
0xE00411F8
ETMTSEVR - RW
Timestamp Event Register. See ARM Embedded Trace Macrocell
Architecture Specification
0xE0041200
ETMTRACEIDR
0x00000000
RW
CoreSight Trace ID Register. See ARM Embedded Trace Macrocell
Architecture Specification
0xE0041208
ETMIDR2
0x00000000
RO
ETM ID Register 2. See ARM Embedded Trace Macrocell Architecture
Specification
0xE0041314
ETMPDSR
0x00000001
RO Device Power-Down Status Register, ETMPDSR on page 10-19
0xE0041EE0
ITMISCIN - RO Integration Test Miscellaneous Inputs, ITMISCIN on page 10-20
0xE0041EE8
ITTRIGOUT - WO Integration Test Trigger Out, ITTRIGOUT on page 10-21
0xE0041EF0
ETM_ITATBCTR2 - RO ETM Integration Test ATB Control 2, ETM_ITATBCTR2 on page 10-21
0xE0041EF8
ETM_ITATBCTR0 - WO ETM Integration Test ATB Control 0, ETM_ITATBCTR0 on page 10-22
0xE0041F00
ETMITCTRL
0x00000000
RW
Integration Mode Control Register. See ARM Embedded Trace
Macrocell Architecture Specification
0xE0041FA0
ETMCLAIMSET - RW
Claim Tag Set Register. See ARM Embedded Trace Macrocell
Architecture Specification
0xE0041FA4
ETMCLAIMCLR - RW
Claim Tag Clear Register. See ARM Embedded Trace Macrocell
Architecture Specification
0xE0041FB0
ETMLAR - RW
Lock Access Register. See ARM Embedded Trace Macrocell
Architecture Specification
0xE0041FB4
ETMLSR - RO
Lock Status Register. See ARM Embedded Trace Macrocell
Architecture Specification
0xE0041FB8
ETMAUTHSTATUS - RO
Authentication Status Register. See ARM Embedded Trace Macrocell
Architecture Specification
0xE0041FCC
ETMDEVTYPE
0x00000013
RO
CoreSight Device Type Register. See ARM Embedded Trace Macrocell
Architecture Specification
Table 10-6 ETM registers (continued)
Address Name Reset Type Description