User guide

Debug
ARM DDI 0337I Copyright © 2005-2008, 2010 ARM Limited. All rights reserved. 7-10
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7.3.2 FPB programmers model
Table 7-7 shows the FPB registers. Depending on the implementation of your processor, some
of these registers might not be present. Any register that is configured as not present reads as
zero.
All FPB registers are described in the ARMv7-M Architecture Reference Manual.
Table 7-7 FPB register summary
Address Name Type Reset Description
0xE0002000 FP_CTRL RW 0x260 FlashPatch Control Register
0xE0002004 FP_REMAP RW - FlashPatch Remap Register
0xE0002008 FP_COMP0 RW
0b0
a
a. For FP_COMP0 to FP_COMP7, bit 0 is reset to 0. Other bits in these registers are
not reset.
FlashPatch Comparator Register0
0xE000200C FP_COMP1 RW 0b0 FlashPatch Comparator Register1
0xE0002010 FP_COMP2 RW 0b0 FlashPatch Comparator Register2
0xE0002014 FP_COMP3 RW 0b0 FlashPatch Comparator Register3
0xE0002018 FP_COMP4 RW 0b0 FlashPatch Comparator Register4
0xE000201C FP_COMP5 RW 0b0 FlashPatch Comparator Register5
0xE0002020 FP_COMP6 RW 0b0 FlashPatch Comparator Register6
0xE0002024 FP_COMP7 RW 0b0 FlashPatch Comparator Register7
0xE0002FD0 PID4 RO 0x04 Peripheral identification registers
0xE0002FD4 PID5 RO 0x00
0xE0002FD8
PID6 RO 0x00
0xE0002FDC
PID7 RO 0x00
0xE0002FE0
PID0 RO 0x03
0xE0002FE4
PID1 RO 0xB0
0xE0002FE8
PID2 RO 0x2B
0xE0002FEC
PID3 RO 0x00
0xE0002FF0
CID0 RO 0x0D Component identification registers
0xE0002FF4 CID1 RO 0xE0
0xE0002FF8
CID2 RO 0x05
0xE0002FFC
CID3 RO 0xB1