User guide

Programmers Model
ARM DDI 0337I Copyright © 2005-2008, 2010 ARM Limited. All rights reserved. 3-6
ID072410 Non-Confidential
Rotate Rotate right ROR Rd, Rn, #<imm> 1
Rotate right
ROR Rd, Rn, Rs 1
With extension
RRX Rd, Rn 1
Count Leading zeroes
CLZ Rd, Rn 1
Load Word
LDR Rd, [Rn, <op2>]
2
c
To PC LDR PC, [Rn, <op2>]
2
c
+ P
Halfword
LDRH Rd, [Rn, <op2>]
2
c
Byte LDRB Rd, [Rn, <op2>]
2
c
Signed halfword LDRSH Rd, [Rn, <op2>]
2
c
Signed byte LDRSB Rd, [Rn, <op2>]
2
c
User word LDRT Rd, [Rn, #<imm>]
2
c
User halfword LDRHT Rd, [Rn, #<imm>]
2
c
User byte LDRBT Rd, [Rn, #<imm>]
2
c
User signed halfword LDRSHT Rd, [Rn, #<imm>]
2
c
User signed byte LDRSBT Rd, [Rn, #<imm>]
2
c
PC relative LDR Rd,[PC, #<imm>]
2
c
Doubleword LDRD Rd, Rd, [Rn, #<imm>] 1 + N
Multiple
LDM Rn, {<reglist>} 1 + N
Multiple including PC
LDM Rn, {<reglist>, PC} 1 + N + P
Store Word
STR Rd, [Rn, <op2>]
2
c
Halfword STRH Rd, [Rn, <op2>]
2
c
Byte STRB Rd, [Rn, <op2>]
2
c
Signed halfword STRSH Rd, [Rn, <op2>]
2
c
Signed byte STRSB Rd, [Rn, <op2>]
2
c
User word STRT Rd, [Rn, #<imm>]
2
c
User halfword STRHT Rd, [Rn, #<imm>]
2
c
User byte STRBT Rd, [Rn, #<imm>]
2
c
User signed halfword STRSHT Rd, [Rn, #<imm>]
2
c
User signed byte STRSBT Rd, [Rn, #<imm>]
2
c
Doubleword STRD Rd, Rd, [Rn, #<imm>] 1 + N
Multiple
STM Rn, {<reglist>} 1 + N
Table 3-1 Cortex-M3 instruction set summary (continued)
Operation Description Assembler Cycles