User guide

Introduction

ID072410 Non-Confidential

1.4 Configurable options

You can configure your Cortex-M3 implementation to include the following optional

components:

Note

You can only configure trace functionality in the following combinations:

• no trace functionality

• ITM and DWT

• ITM, DWT, and ETM

• ITM, DWT, ETM, and HTM.

You can configure the debug features provided in the DWT independently.

Table 1-1 Optional implementation components

Component Description

MPU See Chapter 5 Memory Protection Unit

FPB Flash Patch and Breakpoint Unit. See Chapter 7

Debug

DWT See Chapter 8 Data Watchpoint and Trace Unit

ITM See Chapter 9 Instrumentation Trace Macrocell Unit

ETM See Chapter 10 Embedded Trace Macrocell

AHB-AP

Advanced High-performance Bus Access Port. See

Chapter 7 Debug

HTM interface See AHB Trace Macrocell interface on page 2-6

TPIU See Chapter 11 Trace Port Interface Unit

WIC

Wake-up Interrupt Controller. See Low power modes

on page 6-3

Debug Port See Debug Port AHB-AP interface on page 2-6

Constant AHB control See Bus interfaces on page 2-4