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ARM DDI 0337I Copyright © 2005-2008, 2010 ARM Limited. All rights reserved. Glossary-1
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Glossary
This glossary describes some of the terms used in technical documents from ARM.
Abort A mechanism that indicates to a core that the attempted memory access is invalid or not allowed or
that the data returned by the memory access is invalid. An abort can be caused by the external or
internal memory system as a result of attempting to access invalid or protected instruction or data
memory.
See also Data Abort, External Abort and Prefetch Abort.
Addressing modes Various mechanisms, shared by many different instructions, for generating values used by the
instructions.
Advanced High-performance Bus (AHB)
A bus protocol with a fixed pipeline between address/control and data phases. It only supports a
subset of the functionality provided by the AMBA AXI protocol. The full AMBA AHB protocol
specification includes a number of features that are not commonly required for master and slave IP
developments and ARM recommends only a subset of the protocol is usually used. This subset is
defined as the AMBA AHB-Lite protocol.
See also Advanced Microcontroller Bus Architecture and AHB-Lite.
Advanced Microcontroller Bus Architecture (AMBA)
A family of protocol specifications that describe a strategy for the interconnect. AMBA is the ARM
open standard for on-chip buses. It is an on-chip bus specification that details a strategy for the
interconnection and management of functional blocks that make up a System-on-Chip (SoC). It aids
in the development of embedded processors with one or more CPUs or signal processors and
multiple peripherals. AMBA complements a reusable design methodology by defining a common
backbone for SoC modules.