User guide

Revisions
ARM DDI 0337I Copyright © 2005-2008, 2010 ARM Limited. All rights reserved. A-5
ID072410 Non-Confidential
Note
Issue H of this book is significantly reorganized and simplified to eliminate duplication of
information contained in the ARM Architecture Reference Manual and other ARM
documentation.
Change to timing information for ETMIVALID Issue H removes this information.
SLEEPHOLDREQn removed from table of miscellaneous input
ports timing parameters
Table of low power input ports timing parameters added
FIXHMASTERTYPE added to table of debug input ports timing
parameters
Input changed to Output in table header
SLEEPING, SLEEPDEEP, and SLEEPHOLDACKn removed
from table of miscellaneous output ports timing parameters
SLEEPDEEP, SLEEPING, SLEEPHOLDREQ, and
SLEEPHOLDACK removed
New section added to describe the low power interface signals
New section added to describe the WIC interface signals
SLEEPHOLDACKn removed from table of miscellaneous
signals
Asserted changed to de-asserted in the description of
SLEEPHOLDREQn in table of low power interface signals
FIXMASTERTPYE added to list of AHB-AP interface signals
Table A-2 Differences between issue F and issue G (continued)
Change Location
Table A-3 Differences between issue G and issue H
Change Location
Chapter 1 simplified to provide only a high-level description of
the processor. Some information to Chapter 2.
Chapter 1 Introduction
Chapter 2 Functional Description
Removed the following sections from Chapter 1:
• Execution pipeline stages
• Prefetch unit
• Branch target forwarding
•Store buffers.
See the ARMv7-M Architecture Reference Manual
and the implementation documentation for the
processor.
Added functional description chapter Chapter 2 Functional Description
Simplified description of the programmers model and modes of
operation and execution
About the programmers model on page 3-2
Modes of operation and execution on page 3-3
Added cycle counts to instruction set summary Instruction set summary on page 3-4