User guide

Revisions
ARM DDI 0337I Copyright © 2005-2008, 2010 ARM Limited. All rights reserved. A-3
ID072410 Non-Confidential
HCLK and CLK replaced by FCLK Issue H removes this information.
ETM Trigger Even Register description upgraded
ETM Status Register description updated
TraceEnable register replaced by Trace Start/Stop Resource
Control
TraceEnable Control 2 register added
Lock Status Register added
Description of FIFOFULL Region Register added
Description of FIFOFULL Level Register updated
Description of CoreSight Trace ID Register updated
Description ETM Control Register implementation bits expanded Main Control Register, ETMCR on page 10-11
Description of TraceEnable Control 1 Register updated TraceEnable Control 1 Register, ETMTECR1 on page 10-16
Description ETM ID Register updated to reflect revision 2 ID Register, ETMIDR on page 10-17
Subsection describing ETM Event Resources added Resources on page 10-3
Subsection describing Cross Trigger Interface added Recommended CTI connections on page 10-7
Branch status interface section updated Issue H removes this information.
Note about HADDRICore and HTRANSICore removed
Example of an opcode sequence timing diagram updated
Description of APB interface inputs added
Addition of note about configuring TPIU registers to be present
or not
TPIU programmers model on page 11-5
The following TPIU registers removed from summary table and
descriptions:
• Trigger control registers
• EXTCTL port registers
• Test pattern registers.
Issue H removes this information.
The following TPIU registers added to the summary table and
descriptions:
• Integration Register: TRIGGER
• Integration Mode Control Register
• Integration Register: FIFO data 0
• Integration Register: FIFO data 1
• Claim tag set register
• Claim tag clear register
• Device ID register
• PID registers
• CID registers.
Table A-1 Differences between issue E and issue F (continued)
Change Location