User guide

Embedded Trace Macrocell
ARM DDI 0337I Copyright © 2005-2008, 2010 ARM Limited. All rights reserved. 10-22
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Figure 10-12 ETM_ITATBCTR2 bit assignments
Table 10-17 shows the ETM_ITATBCTR2 bit assignments.
10.3.14 ETM Integration Test ATB Control 0, ETM_ITATBCTR0
The Integration Test ATB Control (ETM_ITATBCTR0) characteristics are:
Purpose Integration test.
Usage constraints You must set bit [0] of ETMITCTRL to use this register.
Configurations This register is only available if the processor is configured to use the
ETM.
Attributes See the register summary in Table 10-6 on page 10-9.
Figure 10-13 shows the ETM_ITATBCTR0 bit assignments.
Figure 10-13 ETM_ITATBCTR0 bit assignments
Table 10-18 shows the ETM_ITATBCTR0 bit assignments.
Reserved
31 10
ATREADY input value
Table 10-17 ETM_ITATBCTR2 bit assignments
Bits Name Function
[31:1] - Reserved
[0] ATREADY input value A read of this bit returns the value of the ETM ATREADY input.
Reserved
31 10
ATVALID output value
Table 10-18 ETM_ITATBCTR0 bit assignments
Bits Name Function
[31:1] - Reserved
[0] ATVALID output value A write to this bit sets the value of the ETM ATVALID output.