Specifications

Cortex-M3 / Cortex-M3 with ETM (AT420/AT425)
Date of Issue: 12-Nov-2008 ARM Errata Notice Document Revision 2.0
PR326-PRDC-009450 v2.0
© Copyright ARM Limited 2008. All rights reserved. Page 5 of 20
Non Confidential
Introduction
Scope
This document describes errata categorised by level of severity. Each description includes:
a unique defect tracking identifier
the current status of the defect
where the implementation deviates from the specification and the conditions under which erroneous
behavior occurs
the implications of the erratum with respect to typical applications
the application and limitations of a ‘work-around’ where possible
Categorisation of Errata
Errata recorded in this document are split into three levels of severity:
Category 1 Behavior that is impossible to work around and that severely restricts the use of
the product in all, or the majority of applications, rendering the device unusable.
Category 2 Behavior that contravenes the specified behavior and that might limit or severely
impair the intended use of specified features, but does not render the product
unusable in all or the majority of applications.
Category 3 Behavior that was not the originally intended behavior but should not cause any
problems in applications.