Specifications

Memory Map and Memory Configuration

3.2 Memory map options

Supporting several memory configurations and operating systems requires some

configurability of the memory map.

CFGBRIDGEMEMMAP

This signal defines the memory regions occupied by AHB bridge1 and

AHB bridge 2. Accesses to memory regions that are not decoded on-chip

are presented to one of the off-chip bridges. If an external device does not

acknowledge the request, a bus fault is generated.

MPMCnSMC

This signal defines the controller that is used to access static memory. If

HIGH, the MPMC controls static memory. If LOW, the SMC controls

static memory.

REMAPSTATIC

When HIGH the region at

0x00000000

is mapped to SSMC chip select 7 if

MPMCnSMC is LOW or MPMC chip select 1 if MPMCnSMC is

HIGH.

REMAPEXTERNAL

When HIGH and REMAPSTATIC is LOW and REMAPMPMCCS5 is

LOW, then the region at

0x00000000

is mapped externally to the

ARM926EJ-S Development Chip.

REMAPMPMCCS5

When HIGH and REMAPSTATIC is LOW, then the region at

0x00000000

is mapped to the MPMC dynamic memory chip select 1

(nMPMCDYCS1).

The control logic is shown in Figure 3-5 on page 3-16.