Specifications

Memory Map and Memory Configuration

the bridge are combinatorial. As there are no registers in the AHB signal paths, the

bridge will not add any delay to a transaction. This mode is designed for cycle accurate

modeling of on-chip masters accessing off-chip slaves.

On-chip (slave) bridge

This section describes the AHB bridge to on-chip peripherals that forms part of the

ARM926EJS PrimeXsys Platform Development Chip multi-layer AHB system. The

on-chip AHB bridge is an AMBA compliant bridge that allows off-chip AHB masters

to access AHB slave peripherals in the ARM926EJ-S PXP subsystem. The on-chip

AHB bridge has the following features:

• AMBA compliant AHB slave and master interfaces

• Synchronous and asynchronous operation

• Pass-through mode for cycle accurate modeling

• Tristate pin control for multi-slave AHB systems off-chip.

The bridge slave interface is part of the off-chip AHB memory map and it will respond

to transactions in the appropriate address range. The address input of the slave interface

is a full 32-bit address, even though it responds to a decoded address range as it is passed

through the bridge unchanged. No address translation is performed. This links the

on-chip and off-chip AHB busses and preserves the on-chip address map.

Transactions initiated by the off-chip AHB masters are passed from the slave interface

to the master interface of the bridge. The response of on-chip peripherals is then passed

back through the bridge. The response of the bridge is dependent on the clock

arrangement between the two AHB busses and response of the on-chip peripheral. The

bridge will always ensure that AMBA AHB protocols are observed on both AHB

busses. To ensure this the slave interface can generate wait states and the master

interface can insert BUSY cycles.

A system design outside of the ARM926EJ-S Development Chip might break the AHB

protocol. If fixed length bursts are broken by an arbiter on the transfer source side of the

bridge, an incomplete burst appears on the destination side of the bridge. To avoid

breaking the AHB protocol, set the configuration signals CFGINCOVERRIDES and

CFGINCOVERRIDES HIGH. All burst information will be converted to INCR. If this

situation cannot be encountered due to the system design, fixed length bursts can be

passed across the bridges (set CFGINCOVERRIDES and CFGINCOVERRIDES

LOW).