Specifications

System Controller and Configuration Logic
2-26 Copyright © 2004, 2006 ARM Limited. All rights reserved. ARM DDI 0287B
Figure 2-7 JTAG Test Access Port
External
JTAG
interface
Multi-ICE
synchronization
nTRST
nTRST
TDO
TDI
TDI
RTCKOUT RTCK
TCK
TCK
TMSIN TMS
nBSTAPENIN nBSTAPEN
Boundary Scan
TAP controller
nTRSTIN
TDIIN
TCKIN
TMS
BSTMSIN
DBGTDO
BSTDOOUT
HIGH
DBGnTDOEN
BSnTDOEN
HIGH
nPOR
SCLK
ARM926EJ-S
processor
ARM926EJ-S Dev. Chip
DBGTMS
DBGTDI
DBGTCKEN
1
0
1
0
1
0
1
0