Specifications
System Controller and Configuration Logic
2-10 Copyright © 2004, 2006 ARM Limited. All rights reserved. ARM DDI 0287B
DOZE mode
In DOZE mode, the system clocks and the System Controller clock are driven from a
low frequency oscillator.
From DOZE mode it is possible to move into SLEEP mode when none of the mode
control bits are set and the processor is in Wait-for-interrupt state.
If SLOW mode or NORMAL mode is required the system moves into the XTAL control
transition state to initialize the crystal oscillator.
XTAL control transition state, XTAL CTL
XTAL control transition state is used to initialize the crystal oscillator. While in this
state, both the system clocks and the System Controller clock are driven from a
low-frequency oscillator.
The system moves into the Switch to XTAL transition state when the crystal oscillator
output is stable. This is indicated when either the Xtal timeout defined in the Xtal
Control Register expires (when the XTALTIMEEN input is valid) or by the XTALON
input being set to logic 1.
Switch to XTAL transition state, SW TO XTAL
Switch to XTAL transition state is used to initiate the switching of the system clock
source from the slow speed oscillator to the crystal oscillator.
The system moves into the SLOW mode when the XTALSW input is set to a logic 1,
to indicate that the clock switching is complete.
Switch from XTAL transition state, SW FROM XTAL
Switch from XTAL transition state is entered when moving from the SLOW mode to
DOZE mode. It initiates the switching of the system clock source from the crystal
oscillator to the slow speed oscillator.
The system moves into the DOZE mode when the XTALSW input is reset to a logic 0,
to indicate that the clock switching is complete.
SLOW mode
In SLOW mode, both the system clocks and the System Controller clock are driven
from the output of the crystal oscillator. If NORMAL mode is required the system
moves into the PLL control transition state. If neither the SLOW or the NORMAL mode
control bits are set the system moves into the Switch from XTAL transition state.