Specifications

System Controller and Configuration Logic

2.1.2 Interrupt response mode

To enable the best possible response to interrupts, you can override the present mode

bits in the System Control register after an interrupt has been generated. This enables,

for example, the state machine to move from the DOZE mode to NORMAL mode after

an interrupt.

The interrupt response functionality is controlled by the interrupt mode control register,

which defines:

• if the functionality has been enabled

• the mode of operation that is required following an interrupt

• what type of interrupt is permitted to enable the interrupt response mode

• an interrupt mode status bit and clear mechanism.

Note

It is not possible for the interrupt response mode to slow the system operating speed, for

example, change mode from NORMAL to SLOW.

The interrupt response mode is cleared by writing logic 0 to the interrupt mode control

Following a power-on reset, the interrupt response mode is disabled.

2.1.3 Wait for interrupt control

To enter SLEEP mode the CPU must enter the Wait-for-interrupt state using register 7

in CP15 of the CPU system control coprocessor. This ensures that the CPU is in a

low-power state. You must also use Wait-for-interrupt whenever short pauses occur in

processing requirements (the system mode control state machine can remain in the same

state).