Specifications

Signals on Pads
ARM DDI 0287B Copyright © 2004, 2006 ARM Limited. All rights reserved. A-29
SSMC SMDATA[12] Data bus B 8 AK12
SSMC SMDATA[13] Data bus B 8 AN10
SSMC SMDATA[14] Data bus B 8 AH13
SSMC SMDATA[15] Data bus B 8 AP10
SSMC SMDATA[16] Data bus B 8 AL11
SSMC SMDATA[17] Data bus B 8 AM11
SSMC SMDATA[18] Data bus B 8 AK13
SSMC SMDATA[19] Data bus B 8 AN11
SSMC SMDATA[20] Data bus B 8 AJ13
SSMC SMDATA[21] Data bus B 8 AP11
SSMC SMDATA[22] Data bus B 8 AL12
SSMC SMDATA[23] Data bus B 8 AM12
SSMC SMDATA[24] Data bus B 8 AH14
SSMC SMDATA[25] Data bus B 8 AP12
SSMC SMDATA[26] Data bus B 8 AJ14
SSMC SMDATA[27] Data bus B 8 AM13
SSMC SMDATA[28] Data bus B 8 AK14
SSMC SMDATA[29] Data bus B 8 AN13
SSMC SMDATA[30] Data bus B 8 AP13
SSMC SMDATA[31]Data bus B8AL14
SSMC SMFBCLK Clock feedback I - AL8
SSMC SMWAIT Wait mode input I - AK7
SSP nSSPCTLOE Output enable SSPCLKOUT O 4 A20
SSP nSSPOE Output enable SSPTXD O 4 E18
SSP SSPCLKEXT External Clock input for SSP I - F19
Table A-1 Pad signals (continued)
Function Signal Description Type Drive BGA