Specifications

Signals on Pads
A-28 Copyright © 2004, 2006 ARM Limited. All rights reserved. ARM DDI 0287B
SSMC SMADDR[19] Address bus O 12 AN17
SSMC SMADDR[20] Address bus O 12 AK16
SSMC SMADDR[21] Address bus O 12 AP18
SSMC SMADDR[22] Address bus O 12 AN18
SSMC SMADDR[23] Address bus O 12 AL18
SSMC SMADDR[24] Address bus O 12 AJ17
SSMC SMADDR[25] Address bus O 12 AM18
SSMC SMADDRVALID Address valid O 8 AK18
SSMC SMBAA Burst address advance O 8 AN19
SSMC SMCANCELWAIT Wait mode cancel I - AH11
SSMC SMCLK[0] Clock out O 16 AM7
SSMC SMCLK[1] Clock out O 16 AN7
SSMC SMCLK[2] Clock out O 16 AP7
SSMC SMDATA[0] Data bus B 8 AK10
SSMC SMDATA[1] Data bus B 8 AM8
SSMC SMDATA[2] Data bus B 8 AJ11
SSMC SMDATA[3] Data bus B 8 AN8
SSMC SMDATA[4] Data bus B 8 AK11
SSMC SMDATA[5] Data bus B 8 AP8
SSMC SMDATA[6] Data bus B 8 AH12
SSMC SMDATA[7] Data bus B 8 AL9
SSMC SMDATA[8] Data bus B 8 AM9
SSMC SMDATA[9] Data bus B 8 AN9
SSMC SMDATA[10] Data bus B 8 AJ12
SSMC SMDATA[11] Data bus B 8 AM10
Table A-1 Pad signals (continued)
Function Signal Description Type Drive BGA