Specifications

Introduction
ARM DDI 0287B Copyright © 2004, 2006 ARM Limited. All rights reserved. 1-5
AHB Monitor
The AHB Monitor block outputs transaction information for the buses in
the ARM926EJ-S Development Chip and is used to evaluate performance
and bandwidth utilization analysis.
For more information on the AHB monitor, see Chapter 4 AHB Monitor.
MBX Graphics Accelerator
The ARM MBX HR-S is a graphics accelerator that operates on 3D scene
data. Triangles are written directly to the Tile Accelerator on a First In
First Out (FIFO) basis so that the CPU is not stalled.
The release version used is MBX HR-S r1p2.
For more information on the MBX accelerator, see the ARM MBX HR-S
Graphics Core Technical Reference Manual and Chapter 7 MBX HR-S
Graphics Accelerator.
System Controller
This provides a control interface for clock generation components
external to the chip. It also controls system-wide and peripherals-specific
energy management features.
The release version used is SP810 SYSCTRL r0p0-00ltd0.
For more information on the system controller, see the ARM PrimeCell
System Controller (SP810) Technical Reference Manual and Chapter 2
System Controller and Configuration Logic.
Multi-Port Memory Controller (MPMC)
The MPMC can be used to interface with Synchronous Dynamic Random
Access Memory (SDRAM) and static memory devices.
The release version used is GX175 MPMC r0p0-00alp2.
For more information on the MPMC, see the ARM Multiport Memory
Controller (GX175) Technical Reference Manual and Chapter 10
Multi-Port Memory Controller (MPMC).
Synchronous Static Memory Controller (SSMC)
The SSMC interfaces to off-chip static memory devices such as Read
Only Memory (ROM), Static Random Access Memory (SRAM), or static
flash memory.
The release version used is PL093 SSMC r0p0-00ltd0.
For more information on the SSMC, see the ARM PrimeCell Static
Memory Controller (PL093) Technical Reference Manual and Chapter 13
Synchronous Static Memory Controller (SSMC).