Specifications

Signals on Pads
A-20 Copyright © 2004, 2006 ARM Limited. All rights reserved. ARM DDI 0287B
MPMC MPMCADDR[5] Address bus O 12 AA4
MPMC MPMCADDR[6] Address bus O 12 AA6
MPMC MPMCADDR[7] Address bus O 12 AB1
MPMC MPMCADDR[8] Address bus O 12 AA7
MPMC MPMCADDR[9] Address bus O 12 AB2
MPMC MPMCADDR[10] Address bus O 12 AB3
MPMC MPMCADDR[11] Address bus O 12 AC1
MPMC MPMCADDR[12] Address bus O 12 AB5
MPMC MPMCADDR[13] Address bus O 12 AC2
MPMC MPMCADDR[14] Address bus O 12 AC3
MPMC MPMCCKE[0] Clock enable O 8 U3
MPMC MPMCCKE[1] Clock enable O 8 W5
MPMC MPMCCKE[2] Clock enable O 8 U2
MPMC MPMCCKE[3] Clock enable O 8 W6
MPMC MPMCCLK[0] Clock out O 16 R2
MPMC MPMCCLK[1] Clock out O 16 R1
MPMC MPMCCLK[2] Clock out O 16 T3
MPMC MPMCCLK[3] Clock out O 16 T2
MPMC MPMCCLK[4] Clock out O 16 T1
MPMC MPMCDATA[0] Data bus B 8 AC4
MPMC MPMCDATA[1] Data bus B 8 AB6
MPMC MPMCDATA[2] Data bus B 8 AD1
MPMC MPMCDATA[3] Data bus B 8 AB7
MPMC MPMCDATA[4] Data bus B 8 AD2
MPMC MPMCDATA[5] Data bus B 8 AD3
Table A-1 Pad signals (continued)
Function Signal Description Type Drive BGA