Specifications

Signals on Pads
ARM DDI 0287B Copyright © 2004, 2006 ARM Limited. All rights reserved. A-15
CLCDC CLPOWER Panel power enable O 4 AM22
Clock HCLKM1 Asynchronous AHB Clock In I - T32
Clock HCLKM2 Asynchronous AHB Clock In I - C28
Clock HCLKS Asynchronous AHB Clock In I - A7
Clock nPLLRESET PLL reset I - H7
Clock PLLCLKEXT Clock input from a PLL I - F8
Clock PLLPWRDN PLL power down I - D3
Clock REFCLK32K 32KHz Reference Clock I - C5
Clock TIMCLKEXT Timer Clock I - F20
Clock XTALCLKEXT Clock input from a crystal
oscillator
I- B5
CPU DBGACK Debug acknowledge O 4 E17
CPU EDBGRQ External Debug request I - C19
DMAC DMACBREQ[0] Burst Transfer Request I - L2
DMAC DMACBREQ[1] Burst Transfer Request I - R5
DMAC DMACBREQ[2] Burst Transfer Request I - L1
DMAC DMACBREQ[3] Burst Transfer Request I - T6
DMAC DMACBREQ[4] Burst Transfer Request I - M4
DMAC DMACBREQ[5] Burst Transfer Request I - T7
DMAC DMACCLR[0] Request Acknowledge Clear O 4 J2
DMAC DMACCLR[1] Request Acknowledge Clear O 4 J1
DMAC DMACCLR[2] Request Acknowledge Clear O 4 K3
DMAC DMACCLR[3] Request Acknowledge Clear O 4 P7
DMAC DMACCLR[4] Request Acknowledge Clear O 4 K2
DMAC DMACCLR[5] Request Acknowledge Clear O 4 P5
Table A-1 Pad signals (continued)
Function Signal Description Type Drive BGA