Specifications

Signals on Pads
A-14 Copyright © 2004, 2006 ARM Limited. All rights reserved. ARM DDI 0287B
CLCDC CLD[2] Data bus O 4 AL23
CLCDC CLD[3] Data bus O 4 AP24
CLCDC CLD[4] Data bus O 4 AK21
CLCDC CLD[5] Data bus O 4 AN24
CLCDC CLD[6] Data bus O 4 AK22
CLCDC CLD[7] Data bus O 4 AL24
CLCDC CLD[8] Data bus O 4 AJ21
CLCDC CLD[9] Data bus O 4 AP25
CLCDC CLD[10] Data bus O 4 AH21
CLCDC CLD[11] Data bus O 4 AN25
CLCDC CLD[12] Data bus O 4 AJ22
CLCDC CLD[13] Data bus O 4 AM25
CLCDC CLD[14] Data bus O 4 AK23
CLCDC CLD[15] Data bus O 4 AP26
CLCDC CLD[16] Data bus O 4 AH22
CLCDC CLD[17] Data bus O 4 AN26
CLCDC CLD[18] Data bus O 4 AM26
CLCDC CLD[19] Data bus O 4 AL26
CLCDC CLD[20] Data bus O 4 AJ23
CLCDC CLD[21] Data bus O 4 AP27
CLCDC CLD[22] Data bus O 4 AH23
CLCDC CLD[23] Data bus O 4 AN27
CLCDC CLFP Frame synch pulse O 4 AJ20
CLCDC CLLE Line end O 4 AK24
CLCDC CLLP Line synch pulse O 4 AK20
Table A-1 Pad signals (continued)
Function Signal Description Type Drive BGA