Specifications
ARM Vector Floating Point Coprocessor (VFP9)
18-8 Copyright © 2004, 2006 ARM Limited. All rights reserved. ARM DDI 0287B
18.4.4 RunFast Mode
RunFast mode is the combination of the following conditions:
• the VFP9-S coprocessor is in Flush-to-Zero mode
• the VFP9-S coprocessor is in Default NaN mode
• all exception enable bits are cleared.
In RunFast mode the VFP9-S coprocessor:
• processes subnormal input operands as positive zeros
• processes results that are tiny before rounding, that is, between the positive and
negative minimum normal values for the destination precision, as positive zeros
• processes input NaNs as default NaNs
• returns the default result specified by the IEEE 754 standard for overflow,
division-by-zero, invalid, or inexact operations fully in hardware and without
additional latency
• processes all operations in hardware without trapping to support code.
RunFast mode enables the programmer to write code for the VFP9-S coprocessor that
runs in a determinable time without support code assistance, regardless of the
characteristics of the input data. In RunFast mode, no user exception traps are available.
However, the exception flags in the FPSCR register are compliant with the IEEE 754
standard for Inexact, Overflow, Invalid Operation, and Division-by-Zero exceptions.
The underflow flag is modified for Flush-to-Zero mode. Each of these flags is set by an
exceptional condition and can be cleared only by a write to the FPSCR register.