Specifications

ARM Vector Floating Point Coprocessor (VFP9)
18-2 Copyright © 2004, 2006 ARM Limited. All rights reserved. ARM DDI 0287B
18.1 About the VFP9-S coprocessor
The VFP9-S coprocessor is an implementation of the Vector Floating-point
Architecture version 2 (VFPv2). The release version used is VFP9-S r1p1.
The coprocessor provides low-cost floating-point computation that is fully compliant
with the ANSI/IEEE Std 754-1985, IEEE Standard for Binary Floating-Point
Arithmetic, referred to in this document as the IEEE 754 standard. The VFP9-S
coprocessor supports all addressing modes described in section C5 of the ARM
Architecture Reference Manual.
The VFP9-S coprocessor is optimized for:
high data transfer bandwidth through 32-bit split load and store buses
fast hardware execution of a high percentage of operations on normalized data
resulting in higher overall performance while providing full IEEE 754 standard
support when required
divide and square root operations in parallel with other arithmetic operations to
reduce the impact of long-latency operations
near IEEE 754 standard compatibility in RunFast mode without support code
assistance, providing determinable run-time calculations for all input data
low power consumption, small die size, and reduced kernel code.
The VFP9-S coprocessor is an ARM enhanced numeric coprocessor that provides IEEE
754 standard-compatible operations. Designed to be incorporated with the ARM9E
family of cores, the VFP9-S coprocessor provides full support of single-precision and
double-precision add, subtract, multiply, divide, and multiply with accumulate
operations. Conversions between floating-point data formats and ARM integer word
format are provided, with special operations to perform the conversion in
round-toward-zero mode for high-level language support.
The VFP9-S coprocessor provides a performance-power-area solution for embedded
applications and high performance for general-purpose applications, such as Java.
Note
This document is intended to be read in conjunction with the Vector Floating-point
Architecture section of the ARM Architecture Reference Manual. Only VFP9-S-specific
implementation issues are described in this section.
For more information on the coprocessor, see the ARM VFP9 Coprocessor Technical
Reference Manual.