Specifications

Vectored Interrupt Controller (VIC)
17-8 Copyright © 2004, 2006 ARM Limited. All rights reserved. ARM DDI 0287B
17.2.5 Interrupt priority logic
The interrupt priority block prioritizes the following requests:
nonvectored interrupt requests
vectored interrupt requests
external interrupt requests.
The highest-priority request generates an IRQ interrupt if the interrupt is not currently
being serviced. Figure 17-6 shows a block diagram of the interrupt priority logic.
Note
nVICIRQIN is the daisy-chained IRQ request input.
Figure 17-6 Interrupt priority logic