Specifications

UART Controller

16.2.5 Implementation details

The following inputs are tied off:

• nUART1DCD is tied HIGH

• nUART1DSR is tied HIGH

• nUART1RI is tied HIGH

• SIRIN1 is tied LOW

• nUART2DCD is tied HIGH

• nUART2DSR is tied HIGH

• nUART2RI is tied HIGH

• SIRIN2 is tied LOW.

The following outputs are unconnected:

• nUART1DTR

• nUART1Out1

• nUART1Out2

• nSIROUT1

• nUART2DTR

• nUART2Out1

• nUART2Out2

• nSIROUT2.

Variations from the 16C550 UART

The PrimeCell UART varies from the industry-standard 16C550 UART device as

follows:

• receive FIFO trigger levels are 1/8, 1/4, 1/2, 3/4, and 7/8

• the internal register map address space, and the bit function of each register differ

• the deltas of the modem status signals are not available.

The following 16C550 UART features are not supported:

• 1.5 stop bits (1 or 2 stop bits only are supported)

• independent receive clock.