Specifications

UART Controller

16.1 About the ARM PrimeCell UART (PL011)

The PrimeCell UART is an Advanced Microcontroller Bus Architecture (AMBA)

compliant System-on-Chip (SoC) peripheral that is developed, tested, and licensed by

ARM.

The release version used is PL011 UART 1v3. The base address for the UART control

registers are

0x101F1000

0x101F2000

, and

0x101F3000

. For more information on the

controller, see the ARM PrimeCell UART (PL011) Technical Reference Manual.

The PrimeCell UART is an AMBA slave module, and connects to the DMA APB. The

PrimeCell UART includes an Infrared Data Association (IrDA) Serial InfraRed (SIR)

protocol ENcoder/DECoder (ENDEC).

The features of the PrimeCell UART are covered under the following headings:

• Features of the PrimeCell UART

• Programmable parameters on page 16-6

• Variations from the 16C550 UART on page 16-7.

Note

Because of changes in the programmer’s model, the PrimeCell UART (PL011) is not

backwards compatible with the previous PrimeCell UART PL010.

16.1.1 Features of the PrimeCell UART

The PrimeCell UART provides:

• Compliance to the AMBA Specification (Rev 2.0) onwards for easy integration

into SoC implementation.

• Programmable use of PrimeCell UART or IrDA SIR input/output.

• Separate 16x8 transmit and 16x12 receive First-In, First-Out memory buffers

(FIFOs) to reduce CPU interrupts.

• Programmable FIFO disabling for 1-byte depth.

• Programmable baud rate generator. This enables division of the reference clock

by (1x16) to (65535 x16) and generates an internal x16 clock. The divisor can be

a fractional number enabling you to use any clock with a frequency >3.6864MHz

as the reference clock.

• Standard asynchronous communication bits (start, stop, and parity). These are

added prior to transmission and removed on reception.