Specifications

Dual Timer/Counters
ARM DDI 0287B Copyright © 2004, 2006 ARM Limited. All rights reserved. 15-5
15.2.2 Programmable parameters
The following Dual-Timer module parameters are programmable:
free-running, periodic, or one-shot timer modes
32-bit or 16-bit timer operation
prescaler divider of 1, 16, or 256
interrupt generation enable and disable
interrupt masking.
15.2.3 Registers
The base address of the PrimeCell timers are:
Timer01
0x101E2000
.
Timer23
0x101E3000.
Some locations within the memory range are reserved:
•offsets
0x40
0xEFC
•offsets
0xF08
0xFDC
.
For detailed information on the timer registers, see the ARM Dual-Timer Module
(SP804) Technical Reference Manual.