Specifications

Direct Memory Access Controller (DMAC)

8.2.2 Registers

The PrimeCell DMAC enables peripheral-to-memory, memory-to-peripheral,

peripheral-to-peripheral, and memory-to-memory transactions. Each DMA stream is

configured to provide unidirectional DMA transfers for a single source and destination.

For example, a bidirectional serial port requires one stream for transmit and one for

receive. The source and destination areas can each be either a memory region or a

peripheral, and can be accessed through the same AHB master, or one area by each

master.

The base address for the PrimeCell DMAC is

0x10130000