Specifications

Color LCD Controller (CLCDC)
ARM DDI 0287B Copyright © 2004, 2006 ARM Limited. All rights reserved. 5-29
PrimeCell Identification Registers
The CLCDPCellID0-3 Registers are four 8-bit read-only registers that span address
locations
0xFF0-0xFFC . The registers can conceptually be treated as a single 32-bit
register. The register is used as a standard cross-peripheral identification system.
Figure 5-17 shows the register bit assignments.
Figure 5-17 CLCDCPCellID0-3 Register bit assignments
The CLCDPCellID0 Register is read-only. It is hard-coded and the fields in the register
determine the reset value. Table 5-16 lists the register bit assignments.
The CLCDPCellID1 Register is read-only. It is hard-coded and the fields in the register
determine the reset value. Table 5-17 lists the register bit assignments.
31 24 23 16 15 8 7 0
CLCDPCellID0
CLCDPCellID0CLCDPCellID1
CLCDPCellID1
CLCDPCellID2CLCDPCellID3
70070707
CLCDPCellID3 CLCDPCellID2
Conceptual register bit
assignment
Actual register bit
assignment
Table 5-16 CLCDPCellID0 Register bit assignments
Bit Name Function
[31:8] Reserved Reserved, read undefined
[7:0] CLCDPCellID0 These bits read back as
0x0D
Table 5-17 CLCDPCellID1 Register bit assignments
Bit Name Function
[31:8] Reserved Reserved, read undefined
[7:0] CLCDPCellID1 These bits read back as 0xF0