Specifications

Color LCD Controller (CLCDC)
5-28 Copyright © 2004, 2006 ARM Limited. All rights reserved. ARM DDI 0287B
The CLCDPeriphID0 Register is read-only. It is hard-coded and the fields in the register
determine the reset value. Table 5-12 lists the register bit assignments.
The CLCDPeriphID1 Register is read-only. It is hard-coded and the fields in the register
determine the reset value. Table 5-13 lists the register bit assignments.
The CLCDPeriphID2 Register is read-only. It is hard-coded and the fields in the register
determine the reset value. Table 5-14 lists the register bit assignments.
The CLCDPeriphID3 Register is read-only. It is hard-coded and the fields in the register
determine the reset value. Table 5-15 lists the register bit assignments.
Table 5-12 CLCDPeriphID0 Register bit assignments
Bit Name Function
[31:8] Reserved Reserved, read undefined
[7:0] PartNumber0 These bits read back as
0x11
Table 5-13 CLCDPeriphID1 Register bit assignments
Bit Name Function
[31:8] Reserved Reserved, read undefined
[7:4] Designer0 These bits read back as
0x1
[3:0] PartNumber1 These bits read back as 0x1
Table 5-14 CLCDPeriphID2 Register bit assignments
Bit Name Function
[31:8] Reserved Reserved, read undefined
[7:4] Revision These bits read back as
0x0
[3:0] Designer1 These bits read back as 0x4
Table 5-15 CLCDPeriphID3 Register bit assignments
Bit Name Function
[31:8] Reserved Reserved, read undefined
[7:0] Configuration These bits read back as
0x0