Specifications

Color LCD Controller (CLCDC)

Cursor Configuration Register

The ClcdCrsrConfig Register is read and write. It provides overall configuration

information for the hardware cursor.

Figure 5-8 shows the register bit assignments.

Figure 5-8 ClcdCrsrConfig Register bit assignments

Table 5-3 lists the register bit assignments.

Cursor Palette Registers

The ClcdCrsrPalette0 and ClcdCrsrPalette1 Registers are read and write. They provide

color palette information for the visible colors of the cursor:

• Colour0 is mapped through CrsrPalette0

• Colour1 is mapped through CrsrPalette1.

The registers provide 24-bit RGB values that are displayed according to the abilities of

the LCD panel in the same way as the frame-buffers palette output is displayed.

In mono STN, only Red[7:4] are significant and, in STN color Red[7:4], Blue[7:4] and

Green[7:4] are significant. In 24 bits per pixel, all 24 bits of the palette registers are

significant.

Undefined

31 210

CrsrFrameSync

CrsrSize

Table 5-3 ClcdCrsrConfig Register bit assignments

Bit Name Function

[31:2] - Reserved, read undefined, do not modify

[1] CrsrFrameSync 0 = Cursor coordinates asynchronous

1 = Cursor coordinates synchronized to frame synchronization pulse

[0] CrsrSize 0 = 32x32 pixel cursor

1 = 64x64 pixel cursor