Specifications

Color LCD Controller (CLCDC)
ARM DDI 0287B Copyright © 2004, 2006 ARM Limited. All rights reserved. 5-17
5.3.2 Hardware cursor registers
Table 5-1 lists the hardware cursor registers.
Table 5-1 PrimeCell CLCDC register summary
Name Address Type
Reset
value
Description
CursorImage
0x10120800-
0x10120BFC
R/W 0x00000000 See Cursor Image RAM Register on page 5-18
ClcdCrsrCtrl
0x10120C00 R/W 0x00 See Cursor Control Register on page 5-18
ClcdCrsrConfig 0x10120C04 R/W 0x0 See Cursor Configuration Register on page 5-20
ClcdCrsrPalette0
0x10120C08 R/W 0x000000 See Cursor Palette Registers on page 5-20
ClcdCrsrPalette1
0x10120C0C R/W 0x000000 See Cursor Palette Registers on page 5-20
ClcdCrsrXY 0x10120C10 R/W 0x00000000 See Cursor XY Position Register on page 5-21
ClcdCrsrClip
0x10120C14 R/W 0x0000 See Cursor Clip Position Register on page 5-22
-
0x10120C18 -
0x10120C1C
-- Reserved
ClcdCrsrIMSC 0x10120C20 R/W 0x0 See Cursor Interrupt Mask Set/Clear Register on page 5-23
ClcdCrsrICR
0x10120C24 WO 0x0 See Cursor Interrupt Clear Register on page 5-24
ClcdCrsrRIS 0x10120C28 RO 0x0 See Cursor Raw Interrupt Status Register on page 5-25
ClcdCrsrMIS
0x10120C2C RO 0x0 See Cursor Masked Interrupt Status Register on page 5-26
-
0x10120C30 -
0x10120FDC
-- Reserved
CLCDPeriphID0 0x10120FE0 RO 0x11 See Peripheral Identification Registers on page 5-27
CLCDPeriphID1
0x10120FE4 RO 0x11 See Peripheral Identification Registers on page 5-27
CLCDPeriphID2 0x10120FE8 RO 0x04 See Peripheral Identification Registers on page 5-27
CLCDPeriphID3
0x10120FEC RO 0x00 See Peripheral Identification Registers on page 5-27
CLCDPCellID0
0x10120FF0 RO 0x0D See PrimeCell Identification Registers on page 5-29
CLCDPCellID1 0x10120FF4 RO 0xF0 See PrimeCell Identification Registers on page 5-29
CLCDPCellID2
0x10120FF8 RO 0x05 See PrimeCell Identification Registers on page 5-29
CLCDPCellID3 0x10120FFC RO 0xB1 See PrimeCell Identification Registers on page 5-29