Specifications

AHB Monitor
4-24 Copyright © 2004, 2006 ARM Limited. All rights reserved. ARM DDI 0287B
Table 4-14 AHB Monitor registers
Name Address Description
CtArmiRd
0x101D0000 Counter. See Ct<layer>Rd on page 4-29.
CtArmiBurstSingle
0x101D0008 Counter. See Ct<layer>BurstSingle on page 4-30.
CtArmiBurstIncr4
0x101D0014 Counter. See Ct<layer>BurstIncr4 on page 4-31.
CtArmiLineFill
0x101D0040 Counter. See CtArm<layer>LineFill on page 4-33.
CtArmiWaitTotal
0x101D0030 Counter. See Ct<layer>WaitTotal on page 4-34.
CtArmiWaitNonSeqSlave
0x101D0028 Counter. See Ct<layer>WaitNonSeqSlave on page 4-34.
CtArmiWaitNonSeqBus
0x101D002C Counter. See Ct<layer>WaitNonSeqBus on page 4-35.
CtArmiWaitThresholdHit
0x101D0034 Counter. See Ct<layer>WaitThresholdHit register on page 4-35.
ArmiWaitThreshold
0x101D0038 4-bit wide R/W Wait Threshold Register. See <layer>WaitThreshold
register on page 4-36.
CtClcdRd
0x101D0100 Counter. See Ct<layer>Rd on page 4-29.
CtClcdBurstIncr
0x101D010C Counter. See Ct<layer>BurstIncr on page 4-31.
CtClcdBurstIncr4
0x101D0114 Counter. See Ct<layer>BurstIncr4 on page 4-31.
CtClcdBurstIncr8
0x101D011C Counter. See Ct<layer>BurstIncr8 on page 4-32.
CtClcdBurstIncr16
0x101D0124 Counter. See Ct<layer>BurstIncr16 on page 4-33.
CtClcdWaitTotal
0x101D0130 Counter. See Ct<layer>WaitTotal on page 4-34.
CtClcdWaitNonSeqSlave
0x101D0128 Counter. See Ct<layer>WaitNonSeqSlave on page 4-34.
CtClcdWaitNonSeqBus
0x101D012C Counter. See Ct<layer>WaitNonSeqBus on page 4-35.
CtClcdWaitThresholdHit
0x101D0134 Counter. See Ct<layer>WaitThresholdHit register on page 4-35.
ClcdWaitThreshold
0x101D0138 4-bit wide R/W Wait Threshold Register. See <layer>WaitThreshold
register on page 4-36.
CtDma0Rd
0x101D0200 Counter. See Ct<layer>Rd on page 4-29.
CtDma0Wr
0x101D0204 Counter. See Ct<layer>Wr on page 4-29.
CtDma0RdUart
0x101D0240 Counter. See Ct<layer>Rd<x> on page 4-29.
CtDma0WrUart
0x101D0244 Counter. See Ct<layer>Wr<x> on page 4-30.
CtDma0RdSci
0x101D0248 Counter. See Ct<layer>Rd<x> on page 4-29.