Specifications
AHB Monitor
ARM DDI 0287B Copyright © 2004, 2006 ARM Limited. All rights reserved. 4-17
Counted events on EXPansion layer
The expansion layer is connected to an AHB-AHB bridge to enable external AHB
components to be interfaced to the ARM926EJ-S Development Chip. The AHB-AHB
bridge passes all AHB signals between AHB domains, with exception of SPLIT and
RETRY responses, which are substituted with stall-cycles with the response signals.
Table 4-10 shows all the events that are recorded on the EXPansion layer. These
counters are enabled through the counter enable bit in the AHBMONCtrlReg. All
counters can be reset by writing to the AHBMONRstCntrs register, and preset to their
absolute address by writing to the AHBMONPrstCntrs register
CtDma1WaitNonSeqSlave Number of wait states on the first transfer of a burst that
were caused by a slave
CtDma1WaitNonSeqBus Number of wait states on the first transfer of a burst that
were caused by the bus infrastructure
CtDma1WaitThresholdHit Number of occurrences that a wait-state exceeded a
configurable threshold
Table 4-10 EXP layer events
Counter Name Description
CtExpRd Total number of read transfers
CtExpWr Total number of write transfers
CtExpRdApbDma Total number of read transfers to the DMA peripherals
APB Bridge
CtExpWrApbDma Total number of write transfers to the DMA
peripherals APB Bridge
CtExpRdApbCore Total number of read transfers to the Core peripherals
APB Bridge
CtExpWrApbCore Total number of write transfers to the Core peripherals
APB Bridge
CtExpBurstSingle Number of single beat bursts
CtExpBurstIncr Number of undefined length bursts
Table 4-9 DMA 1 events (continued)
Counter Name Description