Specifications

AHB Monitor

Counted events on CLCDC layer

The PrimeCell PL110 CLCDC BIU performs only a small subset of AHB transfer

types:

• it performs no writes at all

• all reads are word-sized

• it performs only burst types INCR, INCR4, INCR8, and INCR16

• the unspecified length bursts are used to implement single transfers by the

CLCDC.

There are no BUSY transfers on this layer, because the FIFO in this particular

implementation is synthesized from flip-flops rather than using a compiled RAM block.

However, the RTL does contain busy activity that could affect other configurations.

Table 4-7 shows all the events that are recorded on the CLCDC layer. These counters

are enabled through the counter enable bit in the AHBMONCtrlReg register. All

counters can be reset by writing to the AHBMONRstCntrs register, and preset to their

absolute address by writing to the AHBMONPrstCntrs register.

Table 4-7 CLCDC events

Counter Name Description

CtClcdRd Total number of completed read transfers

CtClcdBurstIncr Number of unspecified length bursts, this format is used

for 1-word transfers)

CtClcdBurstIncr4 Number of 4-word incrementing bursts

CtClcdBurstIncr8 Number of 8-word incrementing bursts

CtClcdBurstIncr16 Number of 16-word incrementing bursts

CtClcdWaitTotal Total number of wait states

CtClcdWaitNonSeqSlave Number of wait states on the first transfer of a burst that

were caused by a slave

CtClcdWaitNonSeqBus Number of wait states on the first transfer of a burst that

were caused by the bus infrastructure

CtClcdWaitThresholdHit Number of occurrences that a wait-state exceeded a

configurable threshold